Embodiments of the present invention relate generally to current control techniques and overload protection circuits and, more particularly to a power factor correction (PFC) circuit configured to control high pulse load current and inrush current.
PFC circuits utilize various protection means against high pulse load current and inrush current. The inrush current is an initial high current flow, usually a short duration surge, usually attributable to a highly reactive initial power load. Such inrush current is undesirable, and may cause damage to circuitries across application instruments, such as, a mobile or portable radiographic X-ray machine.
Various circuits and techniques have been used in the past to control high pulse load current and inrush current. For example, one such conventional technique utilizes a power factor controller using a boost converter. However, this technique has a high storage device requirement, since the output voltage control has to be slow to maintain PFC and there is restriction on output voltage for stable operation of the boost converter.
Furthermore, several PFC circuit providers and generally known digital control techniques address the inrush and pulse load current issues by doing the compensation on a voltage control loop. The compensation is generally done by monitoring the status of output voltage of a boost converter and then changing the proportional gain of current controller (feedback compensation). Since the output voltage is not well controlled for a boost converter in a PFC topology and it carries lot of low frequency ripple (double the line frequency), the compensation is done at a relatively slower rate. For an application like a mobile X-ray machine, where the peak power is very high (much higher than the maximum available power from a wall socket), the time taken by conventional compensation results in very high values of the storage capacitor. Further, as the load range is very high in high power mobile radiographic X-ray application, the loss in the DC-DC converter is very high at a lower load because of a high DC bus voltage value. At a lower load, the DC bus voltage value should be lower so that the loss in the DC-DC converter can be lowered. This helps the DC-DC converter work for a longer period of time. Many designs include a buck switch with a freewheeling diode to enable the DC-DC converter to lower the DC bus voltage value more than the input peak voltage.
Therefore, there exists a need for a power factor correction (PFC) circuit with a novel system and method for controlling high pulse load current and inrush current.